Temirci, CabirBati, Bahri2025-05-102025-05-1020110217-97921793-657810.1142/S02179792110581582-s2.0-79953897227https://doi.org/10.1142/S0217979211058158https://hdl.handle.net/20.500.14720/11720We fabricated the Sn/p-Si Schottky barrier diodes with the interfacial layer metal-insulator semiconductor (D-MIS) and the surface passivation metal semiconductor MS (D-MS) by the anodization or chemical treatment method. The current voltage (I-V) and capacitance voltage (C-V) characteristics of the devices were measured at room temperature. We obtained that the excess capacitance (C-0) value of the MIS Sn/p-Si diode with the anodic oxide layer of 16.88 pF and 0.12 pF for the MS Sn/p-Si ideal diode with the surface passivation by the anodization or chemical treatment method from reverse bias C-V characteristics. Thus, we have succeeded to diminish the excess capacitance value to the limit of 0.12 pF for the MS Sn/p-Si diode by using the anodization or chemical treatment method.eninfo:eu-repo/semantics/closedAccessSchottky Barrier DiodesSurface PassivationMetal-Insulator Layer-Semiconductor DiodesC-V CharacteristicsEffect of Surface Passivation on Capacitance-Voltage Characteristics of Sn/P-si Schottky ContactsArticle254Q2Q2531542WOS:000289466700007