Browsing by Author "Hatas, Hasan"

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Design and Analysis of 15-Level Inverter With a New Voltage Level Generation Method
(Elsevier, 2025) Hatas, Hasan
Multilevel inverters (MLIs) are commonly used in high-power applications for their ability to reduce Total Harmonic Distortion (THD) and improve power quality. However, the need for multiple DC sources in MLIs can increase complexity and cost. This study proposes a novel 15-level MLI topology that uses a High Frequency Link (HFL) to multiplex voltage levels, addressing these challenges. The goal is to reduce THD, voltage stress, and component count, while improving inverter efficiency. The method involves optimizing the transformer winding ratio using a cost optimization algorithm to minimize THD. The topology integrates multiple half H-bridge circuits, enabling the production of 15 voltage levels from a single DC source. Simulation and experimental results show that the proposed topology achieves a 5.4% THD, demonstrating improved performance over conventional 15-level MLIs. Additionally, it maintains high efficiency and low voltage stress, reducing power loss and confirming its applicability in industrial and renewable energy systems.
Design and Control of a Novel Topology for Multilevel Inverters Using High Frequency Link
(Elsevier Science Sa, 2023) Hatas, Hasan; Almali, Mehmet Nuri
The requirement of more than one source in multilevel inverters is an issue to be solved for applications with a single DC source. One solution to this problem is to obtain the required voltages using High Frequency Link (HFL). With the traditional use structure of HFL, only one DC source is generated from each diode bridge unit. In this study, voltage generation is diversified as full and half by adding only one switching device and one diode to this circuit. With the proposed modified HFL circuit topology, 35 levels were obtained from 15 level generating circuits. It was compared with some recently published papers using HFL and a satisfactory result was observed in terms of total standing voltage (TSV), although the use of switching devices was reasonable. Proposed to-pology with different frequency and amplitude outputs has been verified both in simulation environment and experimentally using FPGA board. In terms of the economic dependability of the proposed inverter, calculations for the TSV, cost per level factor, and efficiency have been performed. According to the results obtained, it has been observed that the total harmonic distortion of the output waveform of the proposed topology is 2.5%.
Design and Control of Bypass Diode Multilevel Inverter Using a Single Dc Source
(Elsevier Science Sa, 2023) Hatas, Hasan; Almali, Mehmet Nuri
The main benefit of using asymmetrical sources in multilevel inverters is that the levels can be created with a minimum number of power sources. However, for most applications it is desirable to use multilevel inverters with a single DC source. In this study, a new topology is proposed to use a single DC source and achieve a low THD. In this topology, bypass diode technique is used and 31 levels are obtained. A small and inexpensive high -frequency link (HFL) is used to obtain the input voltages from a DC source. Nearest Level Control (NLC) and SPWM methods are applied to simulate the output waveform to the reference signal. The power distribution of the HFL voltage levels is designed by calculating according to the NLC method. The proposed topology is implemented in a simulation environment on a resistive load and filter. Experimental results and simulation results were confirmed. In the experimental study, FPGA was used to generate the signals. With the proposed 31-level topology, the output waveform THD value is obtained as 2.7% without filter.
Design and Control of Single Dc Source 19-Level Puc Inverter With Sr-Based Level Synthesis
(Springer Singapore Pte Ltd, 2025) Hatas, Hasan
In multilevel inverters, the number of levels can be increased by diversifying the input source voltages in topologies that cannot be extended. In this article, a switched rectifier (SR) with 1 switch was added to a PUC circuit with 8 switches and producing a maximum of 13 levels, increasing the output level to 19 levels. This topology, developed using a single DC source, produces more than one DC voltage level from the input DC source using SR and normal rectifiers with the help of high frequency link. In the PUC circuit, which normally cannot reach high levels, it was possible to increase the number of levels and successfully synthesize the intermediate levels that cannot be synthesized thanks to the SR module. The idea of the proposed topology, which can produce outputs with different amplitudes and frequencies, was verified both in simulation and experimentally using the Genesys-2 FPGA development board. The proposed topology provides high power quality with 4.4% THD by supporting the fundamental frequency control method without ant filter. It is observed that an efficiency of over 96% is achieved in the MLI loss analysis. In high power applications, the SR-PUC MLI structure's efficiency and harmonic performance make it a reliable and cost-effective option.
Design and Implementation of a Novel Switched Rectifier Based Voltage Multiplexer for Multilevel Inverters
(Elsevier Science Sa, 2025) Hatas, Hasan
In this study, a hybrid approach is presented for the asymmetric Cascaded H-Bridge (CHB) MLI topology. Two switches are added to the High Frequency Link (HFL) circuit to allow the HFL output voltage to vary between full and half levels. This modification rescales the DC bus voltages, allowing the system that traditionally produces 9 levels to produce a 15-level output voltage. Simulation studies are performed in Matlab/Simulink and PLECS and experimental verification is performed on an FPGA-based setup. The dynamic performance of the proposed topology is verified for stable operation under high inductive load (200 Omega + 200 mH) and over a wide frequency range (25-200 Hz). Compared to recent studies, the proposed design shows advantages in terms of component count, cost per level and total standing voltage (TSV). The Nearest Level Control (NLC) method is used for switching control, which optimizes the sinusoidal output quality with low switching losses (95.85 % efficiency). This method provides a cost-effective solution, increasing the number of levels of MLI topologies and enhancing their inductive load driving capability, making them suitable for industrial motor drives and renewable energy systems.
Design and Performance Analysis of a Single-Source Cascaded H-Bridge Multilevel Inverter With Switched Rectifier
(Iop Publishing Ltd, 2025) Hatas, Hasan
MLIs provide better performance than traditional two-level inverters due to reduced harmonic distortion, reduced electromagnetic interference, and increased AC output voltage at lower voltages, but MLIs have a shortcoming such as increased source count. This paper proposes a new topology combination using Switched Rectifier (SR) and High Frequency Link (HFL) that compensates for the increased source count. With this variation, the Cascaded H-Bridge (CHB) MLI, which produces 27 levels with 16 switches, is configured with SR, and the output level is increased to 33. The proposed topology, which can produce outputs with varying frequency and amplitude, is confirmed using the Genesys-2 FPGA development board in both simulation and experimentation. The Nearest Level Control method, which targets low switching frequency, is used to minimize energy losses and reduce total harmonic distortion. Total standing voltage (TSV), cost factor per level, and efficiency calculations are performed to assess the proposed inverter's economic feasibility. These results are then compared with those of many studies that use HFL in terms of component count, TSV, cost factor and it is noted that the results are like counterpart MLI topologies. Although TSV and cost factor per level are similar, the increase from 27 levels to 33 levels with 1 switch is seen as a significant increase.
Design of a 21-Level Multilevel Inverter With Minimum Number of Devices Count
(Wiley, 2023) Karakilic, Murat; Hatas, Hasan; Almali, M. Nuri
Multilevel inverters (MLIs) have attracted the attention of researchers for their needs in industrial applications, renewable energy systems, and electric vehicles. MLIs require a large number of power electronic components to synthesize higher levels at the output voltage. However, overuse of power electronic devices increases the complexity, losses, and cost of MLIs. In this study, a new MLI has been proposed with a reduced number of power switches. The basic unit of the proposed MLI comprises only three independent DC sources and 10 switches (eight unidirectional and two bidirectional) to produce 21 levels at the output voltage waveform. The nearest level control (NLC) modulation method has been used to produce gate pulses. Furthermore, three extension topologies have been proposed to generate a higher number of levels, and the extension parameters have been compared with recently introduced and conventional topologies. The comparative study shows that the proposed MLI topology requires fewer components in terms of power electronics parameters than the others. On the other hand, the presented first extension study that can be used for all non-extendable basic units is one of the prominent values of the study. Simulation studies showing modulation methods, switching patterns, and signal outputs were performed with Matlab/Simulink. A prototype of the proposed main module has been realized and tested in the laboratory with an FPGA processing board. Experimental results have been verified with simulation results, and the performance of the proposed topology has been proven.
HSCU-Based 31-Level Multilevel Inverter Design With Soft Charging Capability
(Springer, 2025) Karakilic, Murat; Hatas, Hasan
In this paper, a two-stage hybrid switched capacitor (SC)-based MLI topology is proposed to overcome the fundamental problems of conventional multilevel inverters (MLIs) such as high-power component count and the need for multiple DC sources. First, the proposed hexagonal switched capacitor unit (HSCU) achieves 300% voltage gain and does not require any additional balancing circuitry. This structure can generate three different DC bus voltages from a single DC source using only four power switches, two diodes and two capacitors. A 31-level SC-MLI topology is developed by coupling two HSCUs with a PUC circuit in a hybrid structure. Capacitors generate high peak currents in the charging loops. The proposed HSCU suppresses the charging current peaks with soft charging cell (SCC). The results show that SCC successfully reduces the current peaks and improves the circuit performance. The proposed topology achieves 96.14% efficiency while significantly reducing the number of components and is found to offer a lower cost solution compared to existing studies in literature. The performance of the proposed SC-MLI is verified by simulation and experimental results, and the output waveform integrity is maintained in tests at different frequencies, modulation indices and load conditions. The results prove that this topology is low-cost, highly efficient and suitable for practical applications.
Low-Cost Single-Source 17 Level Multilevel Inverter With Reduced Switch Count
(Iop Publishing Ltd, 2025) Karakilic, Murat; Zeynalov, Javanshir; Hatas, Hasan
This paper introduces an innovative multi-level inverter (MLI) topology operating with a single DC source. The proposed structure consists of a DC-DC rectifier (HFL), a switched capacitor (SC) unit and a Packaged U-Cell (PUC) module. The topology synthesizes 17 voltage levels at the output with only 10 power switches, offering low control complexity and high power efficiency. The high number of levels at the output voltage provides a high quality output voltage wave. A soft charging cell (SCC) is used to suppress impulsive charging currents in the switched capacitors. Experimental results show that SCC effectively suppresses impulsive currents in switched capacitors. The high frequency link (HFL) used to provide high voltage gain improves the cost efficiency of the system by reducing transformer sizes and costs. Simulation and experimental results show that the proposed topology achieves 96.92% efficiency, near sinusoidal current output and total harmonic distortion (THD) values between 4.99% and 1.23%. Moreover, with a low cost function (CF) value of 1.60, it is proven to offer a viable alternative for applications such as Renewable Energy Systems (RES) and Electric Vehicles (EVs). These findings demonstrate the applicability of the proposed MLI topology in these areas with low cost, high efficiency and quality power output.
A Novel Asymmetric Cascaded H-Bridge Concept Using Switched Rectifier
(Wiley, 2025) Hatas, Hasan
In this paper, a new concept is proposed for classical cascaded H-bridge (CHB) multilevel inverter (MLI) configurations. The proposed structure includes a DC-DC converter circuit (switching rectifier) that generates multiple asymmetric voltages at the input of the H-bridges. This SR circuit can generate different voltages (1VDC and 2VDC) at the same terminals, thus providing a compact solution to existing topologies. Multiple DC bus voltages are generated using HFL and SR, resulting in higher levels at the output compared to traditional asymmetric source configurations. Three H-bridge circuits that generate a 27-level in trinary configuration and a 15-level in binary configuration are combined with two SRs to produce a 35-level output. With an output efficiency of over 96%, the topology offers low power losses and sustainable performance, making it an energy-efficient and cost-effective alternative. The high output level and stable performance characteristics make this hybrid CHB structure suitable for renewable energy systems, electric vehicles, and general power electronics applications. A comprehensive comparison with other MLI designs in the literature is made, and the simulation results are validated with a low-power prototype.
A Novel Single-Source 13-Level Switched- Capacitor Inverter With Triple Voltage Gain
(IEEE-Inst Electrical Electronics Engineers inc, 2025) Taissariyeva, Kyrmyzy; Karakilic, Murat; Mussilimov, Kuanysh; Hatas, Hasan
In recent years, the growing demand for efficient voltage boosting solutions has been driven by advancements in renewable energy systems, electric vehicles (EVs), and photovoltaic (PV) arrays. However, conventional magnetic-based inverters remain bulky and inefficient for compact, high-performance applications, limiting their use in emerging technologies. To address this, the objective of this study is to develop a compact, single-source switched-capacitor multilevel inverter (SC-MLI) topology that achieves high voltage gain with minimal component count. The proposed 13-level SC-MLI employs a novel switched-capacitor structure and is evaluated under Natural Level Control (NLC) and Sinusoidal PWM (SPWM) schemes. Theoretical analysis, MATLAB/Simulink simulations, and experimental validation on a 100-1000 W prototype are carried out, along with thermal modeling in PLECS. The results show that the topology achieves a voltage gain of 3, maintains capacitor self-balancing without auxiliary circuits, and reaches a peak efficiency of 97.2% (simulation) and 95.3% (experiment). Moreover, it meets harmonic standards, reduces total harmonic distortion (THD), and outperforms recent single-source designs in terms of accuracy, cost, and control simplicity. This makes the proposed topology highly suitable for grid-connected PV systems, electric vehicle chargers, and compact renewable energy interfaces, with theoretical scalability toward medium- and high-power applications.
Open-Circuit Fault Detection in T-Type MLI Using XGBoost: A Machine Learning-Based Approach
(IEEE, 2025) Karakilic, Murat; Hatas, Hasan; Pacal, Ishak
Prediction of open circuit (OC) faults in a T-Type multilevel inverter (MLI) with high accuracy using machine learning (ML) models is a critical issue for the reliability of power electronic systems. In this study, OC faults that may occur in any of the nine switches in the inverter circuit are detected and classified using a data-driven approach. K-Nearest Neighbors (KNN) and XGBoost algorithms are applied for machine learning based fault detection and their performances are compared. The data set for fault detection is obtained from randomly generated OC faults in the T-Type MLI circuit modeled in MATLAB/Simulink environment. For each fault class, 255 signal samples are obtained for two cycles (4 ms) at a sampling frequency of 5 kHz and used as input data to the ML models. The XGBoost model shows the best performance with an accuracy of 98.37%. This shows that it provides fast and reliable fault detection in large data sets. The confusion matrix, accuracy and loss plots are used to analyze the performance of the model and the study demonstrates the applicability of ML-based fault detection in inverter systems.
Yenilenebilir Enerji Sistemleri için Düşük Maliyetli ve Yüksek Verimli Yeni Bir 15 Seviyeli Hibrit MLI Topolojisi
(2025) Karakılıç, Murat; Hatas, Hasan
Bu makalede, tek DC kaynaklı çok seviyeli invertörler (ÇSE) için yeni bir hibrit model önerilmektedir. Önerilen anahtarlamalı diyot (AD) ve yüksek frekans bağlantısı (YFB) hibrit yapısı, tek bir DC kaynak gerilimi kullanır ve PUC devresine çoklu DA gerilimleri sağlar. ÇSE, yalnızca 8 güç anahtarı kullanarak çıkış voltajı dalga formunda 15 seviye üretir. Kontrol karmaşıklığını azaltır ve 2,71'lik düşük maliyet fonksiyonu (MF) değeriyle uygun maliyetli bir çözüm sağlar. Literatürdeki son çalışmalarla kapsamlı bir karşılaştırma yapılmıştır. Çoğu çalışmanın aksine, gerilim kazancı için YFB kullanır. Yük akımının çoğu doğrudan giriş kaynağından çekilir ve küçük bir kısmı yüksek frekans transformatörü üzerinden çekilir. Bu, transformatör boyutunu ve maliyetlerini önemli ölçüde azaltır. Endüktif yüklerle yapılan testlerde, çıkış neredeyse saf sinüzoidal dalga biçimindedir. Toplam harmonik bozulma (THB) 50Ω + 25mH düşük endüktif yük ile %1,41 olarak ölçülmüştür. PLECS ile yapılan kayıp analizinde invertör verimliliği %96,48'dir. Polarite geçişleri sırasında oluşan gerilim pikleri diyot yerine kontrollü güç anahtarları kullanılarak giderilmiş ve stabilize bir çıkış elde edilmiştir.