A Novel and Facilitator Virtual Phase Generating Technique for Microcontrollers in Electric Vehicle Powertrain Systems

Abstract

In light of the increasing need for efficient and dependable electric vehicle (EV) powertrain systems, the development of advanced control techniques is essential for improving performance and energy efficiency to fulfil industry standards and consumer expectations. With the rapid expansion of high and new information technologies, computer and microprocessor control-based electric machinery (EM) and power electronic converter (PEC) devices are increasingly utilized in EV powertrain systems. Therefore, it's important to sample and acquire three-phase information to control these devices. Considering this aspect, this paper proposes a new and facilitator virtual phase-generating technique with a π/12 delay time to improve the operational performance of the EMs and PECs in EV powertrain systems. The proposed methodology quickly generates virtual phases by utilizing calculated and simplified trigonometric expressions. The proposed technique provides significant improvements in speed, tracking accuracy, minimal peak overshoot, phase tracking, and frequency adaptation, while remaining simpler to implement than existing methods. Specifically, it reduces delay time by 87.5 %, lowers buffer requirements from 3600 to 450 samples, and thereby enhances system responsiveness and reduces RAM usage—making it well suited for microcontrollers with limited memory. Additionally, by relying on single-phase voltage sensing, the method eliminates the need for multi-phase sensing circuitry, reducing analog-to-digital conversion overhead and power consumption, which is especially critical for battery-powered EV applications where efficient resource utilization directly impacts operational runtime and system reliability. Detailed theoretical and quantitative results are conducted to show the efficiency and feasibility of the proposed technique over the existing literature. The obtained real microcontroller including eZdsp TMS320F28335 board and processor-in-the-loop (PIL)-based quasi-real-time test results provide that the proposed technique meets its objectives with high performance. © 2025 Elsevier B.V., All rights reserved.