High-Barrier Height Sn/P-si Schottky Diodes With Interfacial Layer by Anodization Process

Abstract

We have fabricated the Sn/p-Si Schottky barrier diodes with different surface treatments. Prior to the Sn evaporation on the p-Si(0 0 1), the first kinds of samples consisted of a dip in diluted aqueous HF solution followed by a rinse in de-ionized water (sample 1, SDI), the second kinds of samples several steps of anodization in aqueous KOH solution each followed by a dip in diluted aqueous HF solution and a subsequent rinse in de-ionized water (sample 2, SD2), and the third kinds of samples one anodization step only (sample 3, SD3). We have found the lowest values of both the barrier heights and ideality factors with the diodes of preparation type SD2. The anodization, on the other hand, have increased both, the barrier heights as well as the ideality factors. The extrapolation of the barrier heights versus ideality factors plot to the ideality factor determined by the image force effect have given the laterally homogeneous barrier heights of approximately 0.75 and 0.92 eV for the SD2 and SD3 diodes. Furthermore, we have calculated a mean tunneling barrier height of (chi) = 0.12 eV for the MIS Sn/p-Si diodes with the anodic oxide layer. (C) 2001 Elsevier Science B.V. All rights reserved.